notesum.ai
Published at November 18Analysis of Hardware Synthesis Strategies for Machine Learning in Collider Trigger and Data Acquisition
physics.ins-det
cs.AR
hep-ex
Released Date: November 18, 2024
Authors: Haoyi Jia1, Abhilasha Dave2, Julia Gonski2, Ryan Herbst2
Aff.: 1Stanford University; 2SLAC National Accelerator Laboratory

| Implementation | BRAM | DSPs | FFs | LUTs | Latency [s] |
|---|---|---|---|---|---|
| SNL | 5 | 153 | 9680 | 14795 | 0.495 |
| hls4ml(Resource, matching latency) | 200 | 130 | 18707 | 25498 | 0.53-0.545 |
| hls4ml(Latency, matching latency) | 0 | 47 | 54687 | 150932 | 0.595 |
| hls4ml(Latency, optimized latency) | 0 | 2315 | 21988 | 146057 | 0.035 |